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AS5130 8-bit programmable magnetic rotary encoder with motion detection & multiturn www.austriamicrosystems.com/AS5130 revision 1.12 1 - 41 datasheet 1 general description the AS5130 is a contactless magnetic rotary encoder for accurate angular measurement over a full turn of 360o. it is a system-on-chip, combining integrated hall elements, analog front end and digital signal processing in a single device. the angle can be measured using only a simple two-pole magnet rotating over the center of the chip. the magnet may be placed above or below the ic. the absolute angle measurement provides instant indication of the magnet?s angular position with a resolution of 8 bit = 256 positions per revolution. this digital data is available as a serial bit stream and as a pwm signal. the AS5130 can be operated in pulsed mode (vsupply=off), which reduces the average power consumption significantly. during vsupply=off, the measured angle can be stored using an internal storage register supplied by a low power voltage line. this mode achieves very low power consumption during polling of the rotary position of the magnet. if the position of the magnet changes, then the motion detection feature wakes up an external system. the device is capable of counting the amount of magnet revolutions. the multi turn counter value is stored in a register and can be read in addition to the angle information. furthermore, any arbitrary position can be set as zero-position. the system is tolerant to misalignment, air gap variations, temperature variations and external magnetic fields and high reliability due to non-contact sensing. figure 1. AS5130 block diagram 2 key features 360o contactless angular position encoding two digital 8-bit absolute outputs: - serial interface - pulse width modulated (pwm) output user programmable zero position high speed: up to 30000 rpm failure detection mode for magnet placement monitoring and loss of power supply wide temperature range: -40oc to +125oc multi turn counter / movement detection small pb-free package: ssop-16 (5.3mm x 6.2mm) automotive qualified to aec-q100, grade 1 3 applications the AS5130 is an ideal solution for ignition key position sensing, steering wheel position sensing, transmission gearbox encoder, front panel rotary switches and replacement of potentiometers. tracking adc & angle decoder hall array & frontend amplifier power management otp absolute serial interface (ssi) dio pwm dclk prog cs pwm decoder cos sin agc c1 mag zero postion agc ang cao AS5130 sinp / sinn / cosp / cosn ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 2 - 41 AS5130 datasheet - contents contents 1 general description ......................................................................................................... ......................................................... 1 2 key features................................................................................................................ ............................................................. 1 3 applications................................................................................................................ ............................................................... 1 4 pin assignments ....................................................................................................................................................................... 4 4.1 pin descriptions.................................................................................................................................................................................... 4 5 absolute maximum ratings .................................................................................................... .................................................. 5 6 electrical characteristics.................................................................................................. ......................................................... 6 6.1 timing characteristics .................................................................................................... ...................................................................... 8 6.2 magnetic input range ...................................................................................................... .................................................................... 8 7 detailed description........................................................................................................ .......................................................... 9 7.1 connecting the AS5130..................................................................................................... ................................................................... 9 7.1.1 serial 3-wire connection (default setting).............................................................................. .................................................... 9 7.1.2 serial 3-wire connection (otp programming option)....................................................................... ....................................... 11 7.1.3 1-wire pwm connection ................................................................................................... ........................................................ 11 7.1.4 analog output........................................................................................................... ................................................................. 12 7.1.5 analog sin/cos outputs with external interpolator....................................................................... ............................................. 13 7.2 serial synchronous interface (ssi) ........................................................................................ ............................................................ 15 7.2.1 commands of the ssi in normal mode ...................................................................................... ............................................... 15 7.2.2 commands of the ssi in extended mode.................................................................................... .............................................. 16 7.3 otp programming.............................................................................................................................................................................. 17 7.4 multi turn counter........................................................................................................ ...................................................................... 19 7.5 AS5130 status indicators .................................................................................................. ................................................................. 19 7.5.1 lock status bit........................................................................................................................................................................... 19 7.5.2 magnetic field strength indicators ...................................................................................... ...................................................... 19 7.6 ?pushbutton? feature...................................................................................................... .................................................................... 20 7.7 high speed operation ...................................................................................................... .................................................................. 21 7.7.1 propagation delay ....................................................................................................... .............................................................. 21 7.7.2 sampling rate ........................................................................................................... ................................................................ 21 7.7.3 chip internal lowpass filtering ......................................................................................... ........................................................ 21 7.7.4 digital readout rate.................................................................................................... .............................................................. 21 7.7.5 total propagation delay of the AS5130 ................................................................................... ................................................. 21 7.8 reduced power modes ....................................................................................................... ............................................................... 22 7.8.1 low power mode ....................................................................................................................................................................... 22 7.8.2 power cycling mode...................................................................................................... ............................................................ 23 7.8.3 polling mode ............................................................................................................ .................................................................. 24 8 application information ..................................................................................................... ...................................................... 27 8.1 application example i: 3-wire sensor with m agnetic field strength indication .............................................. ................................... 27 8.2 application example ii: low-power encoder...................................................................................................................................... 28 8.3 application example iii: polling mode ..................................................................................... ........................................................... 29 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 3 - 41 AS5130 datasheet - contents 8.4 accuracy of the encoder system ............................................................................................ ........................................................... 30 8.4.1 quantization error...................................................................................................... ................................................................ 30 8.4.2 vertical distance of the magnet......................................................................................... ........................................................ 32 8.4.3 choosing the proper magnet.............................................................................................. ....................................................... 33 8.4.4 magnet placement........................................................................................................ ............................................................. 34 8.4.5 lateral displacement of the magnet ...................................................................................... .................................................... 35 8.4.6 magnet size............................................................................................................. .................................................................. 36 9 package drawings and markings ............................................................................................... ............................................ 37 9.1 recommended pcb footprint................................................................................................. ........................................................... 38 10 ordering information....................................................................................................... ...................................................... 40 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 4 - 41 AS5130 datasheet - pin assignments 4 pin assignments figure 2. pin assignments (top view) 4.1 pin descriptions table 1. pin descriptions pin name pin number description cao 1 indicates if the magnetic field is present. if the field is too low, the signal is hi. prog 2 otp programming pad, programming voltage. for normal operation it must be left unconnected. vss 3 supply ground. sinp 4 used for factory testing. for normal operation it must be left unconnected. sinn 5 used for factory testing. for normal operation it must be left unconnected. cosp 6 used for factory testing. for normal operation it must be left unconnected. cosn 7 used for factory testing. for normal operation it must be left unconnected. test coil 8 test pin. must be left unconnected. dclk 9 clock source for ssi communication. schmitt trigger input. cs 10 chip select for ssi. active high. schmitt trigger input. dio 11 data input / output for ssi communication. vdd 12 positive supply voltage 5v. c1 13 test mode selector. for normal operation it must be connected to vss. wake 14 interrupt output. used for polling mode. open drain nmos. use pull-up resistor with >1.5k . pwm 15 pulse width modulation output. 0.5s width step per lsb. dv dd 16 pin to connect to low power supply for polling mode. must be connected to vss in normal mode. AS5130 1 2 3 4 5 6 7 8 12 16 15 14 13 cao prog vss sinp sinn cosp cosn testcoil dv dd pwm wake c1 vdd dio cs dclk 11 10 9 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 5 - 41 AS5130 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 6 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max units comments supply voltage 0.3 7 v only relevant for polling operation mode, supply voltage with capacitor of the integrated storage register during t off phase of vdd input pin voltage v ss -0.5 vdd v input current (latchup immunity) -100 100 ma norm: eia/jesd78 classii level a electrostatic discharge 2 kv norm: jesd22-a114e package thermal resistan ce ssop-16 133 168 k/w still air / single layer pcb storage temperature -55 150 oc ambient temperature -40 125 oc junction temperature 150 oc package body temperature 260 oc norm: ipc/jedec j-std-020. the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/ jedec j-std-020 ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices? . the lead finish for pb-free leaded packages is matte tin (100% sn). humidity non-condensing 5 85 % moisture sensitivity level (msl) 3 represents a maximum floor life time of 168h ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 6 - 41 AS5130 datasheet - electrical characteristics 6 electrical characteristics t amb = -40oc to +125oc, unless otherwise noted . table 3. electrical characteristics symbol parameter conditions min typ max units vdd positive supply voltage except otp programming 4.5 5 5.5 v dv dd polling mode supply voltage 3.6 5 5.5 v idd power supply current 14 24 ma i off power down mode 1.4 2 ma n resolution 8bit 1.406 deg t pwrup power up time startup from zero 2000 s startup with preset agc - polling mode (supplied during t off phase of vdd from the external buffer capacitor via dv dd pin) 250 startup from low power mode 150 t da propagation delay analog signal path; over full temperature range 15 17 s t dd tracking rate step rate of tracking adc; 1 step = 1.406o 0.85 1.15 1.45 s t delay signal processing delay total signal processing delay, analog + digital + ssi readout (t da + t dd + t ssi ) 21.55 s t analog filter time constant internal lowpass filter 4.1 6.6 12.5 s inl cm accuracy centered magnet -2 2 within horizontal displacement radius (see parameters for magnet) -3 3 tn transition noise rms (1 sigma) 0.235 por r power-on-reset levels v dd rising 3.7 4 4,3 v por f v dd falling 3.4 3.7 3.9 v parameters for magnet n rotational speed frequencies above 1000 rpm causes an additional not specified dnl error -30000 30000 rpm md magnet diameter diametrically magnetized 6 mm mt magnet thickness 2.5 mm b i magnetic input range valid for use of full range of sensitivity 32 75 mt s magnetic sensitivity of agc agc value available at ssi 0.5 5 lsb/mt b dc magnetic offset magnetic stray field without gradient 4 mt dc/ac characteristics for digital inputs and outputs cmos input v ih high level input voltage 0.7 x v dd v v il low level input voltage 0.3 x v dd v i leak input leakage current 1a cmos output ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 7 - 41 AS5130 datasheet - electrical characteristics v oh high level output voltage v dd - 0.5 v v ol low level output voltage vss + 0.4 v c l capacitive load 35 pf t slew slew rate external capacitive load c_l = 35pf external series resistance r = 0 junction temperature t j = 136oc rise time of the internal driver t_rise = 3ns fall time of the internal driver t_fall = 3ns 30 ns t delay time rise fall 15 ns v out_wake up wake up output open drain output with tri-state behavior 5 v programming parameters v prog programming voltage static voltage at pin prog 8.0 8.5 v i prog programming current 100 ma tamb prog programming ambient temperature during programming 0 85 oc t prog programming time timing is internally generated 2 4 s v r,prog analog readback voltage during analog readback mode at pin prog 0.5 v v r,unprog 2.2 3.5 wake lsb angle difference threshold for wake up generation factory setting is 4 lsb, value is accessible by ssi in buffered register and can be changed by customer. 0 127 lsb 8-bit pwm output n pwm pwm resolution 8bit pw min pwm pulse width angle = 0o (00 h ) 0.71 0.55 0.43 s pw max pwm pulse width angle = 358.6o (ff h ) 182.88 142.24 108.48 s pw p pwm period over full temperature range 183.6 142.8 108.9 s f pwm pwm frequency =1 / pwm period 5.44 7 9.18 khz hyst digital hysteresis at change of rotation direction 1 bit serial 8-bit output f clk clock frequency normal operation 6mhz t clk 166.6 ns f clk , p clock frequency during otp programming 250 500 khz table 3. electrical characteristics (continued) symbol parameter conditions min typ max units ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 8 - 41 AS5130 datasheet - electrical characteristics 6.1 timing characteristics t amb = -40oc to 125oc, unless otherwise noted. 6.2 magnetic input range the magnetic input range is defined by the agc loop. this regulating loop keeps the hall sensor output in the optimum range for low snr by adjusting the hall bias current. this loop can adjust to a magnetic field strength variation of 38%. the agc output voltage is an indicator for the magnetic field. the nominal magnetic field for a balanced agc is defined by the hall bias and the hall sensitivity and can be set by a variable gain in the signal path. the gain can be set in 8 steps in the otp or by the ssi in a mirror register. the resulting magnetic input range is a val ue of b nominal 38% inside of a range of 32mt ?75mt, if the trimming is performed by the customer. table 4. timing characteristics symbol parameter conditions min typ max units t0 rising clk to cs 15 -- ns t1 chip select to positive edge of clk 15 -- ns t2 chip select to drive bus externally -- -- ns t3 setup time command bit, data valid to positive edge of clk 30 ns t4 hold time command bit, data valid after positive edge of clk 30 ns t5 float time, positive edge of clk for last command bit to bus float 30 clk/2 ns t6 bus driving time, positive edge of clk for last command bit to bus drive clk/2 +0 clk/2 +30 ns t7 setup time data bit, data valid to positive edge of clk clk/2 +0 clk/2 +30 ns t8 hold time data bit, data valid after positive edge of clk clk/2 +0 clk/2 +30 ns t9 hold time chip select, positive edge clk to negative edge of chip select 30 ns t10 bus floating time, negative edge of chip select to float bus 03 0n s t to timeout period in 2-wire mode (from rising edge of clk) 20 24 s table 5. magnetic input range setting 012345 6 7 binary 000 001 010 011 100 101 110 111 gain a 0.9 1.05 1.2 1.4 1.65 1.9 2.2 2.55 b limit max. 75mt min. 32mt ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 9 - 41 AS5130 datasheet - detailed description 7 detailed description figure 3. typical arrangement of AS5130 and magnet 7.1 connecting the AS5130 the AS5130 can be connected to an external controller in several ways as listed below: serial 3-wire connection (default setting) serial 3-wire connection (otp programming option) 1-wire pwm connection analog output analog sin/cos outputs with external interpolator 7.1.1 serial 3-wire connection (default setting) in this mode, the AS5130 is connected to the external controller via three ssi signals: chip select (cs), clock (clk) input and dio (data) in/ output. this configuration not only helps to read and write data but also defines different operation modes. the data transfer in all cases is done via the dio port. figure 4. standard ssi serial data interface v dd v ss micro controller AS5130 100n v ss +5v vdd cs v dd clk dio v ss AS5130 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 10 - 41 AS5130 datasheet - detailed description figure 5. normal operation mode figure 6. extended operation mode (for access of otp only) table 6. serial bit sequence (16-bit read/write) write command read/write data c4 c3 c2 c1 c0 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 table 7. serial bit sequence (16-bit read/write) write command read/write data c4 c3 c2 c1 c0 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 dclk cs dio t2 t5 t3 t4 dio t6 t9 cmd_phase data_phase t7 t8 t10 t12 t13 t11 dio write t1 d0 d15 d13 d13 d0 d14 d15 cmd4 cmd3 cmd2 cmd1 cmd0 read d14 cmd read: device to c write: c to device dclk cs dio t2 t5 t3 t4 dio t6 t9 cmd_phase data_phase t7 t8 t10 t12 t13 t11 dio write t1 d0 d45 d44 d44 d0 d45 cmd4 cmd3 cmd2 cmd1 cmd0 read cmd ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 11 - 41 AS5130 datasheet - detailed description 7.1.2 serial 3-wire connection (otp programming option) this mode provides with an option to configure the serial interface for programming the otp register. using a clock input (clk) , dio (data) in/ output and cs pin, it is possible to write and read out data from the otp register. the data transfer is done via the dio chann el. for programming, the prog pin must be connected to +8v. analog readout for trimming verification is mandatory. figure 7. serial data transmission in continuous readout mode 7.1.3 1-wire pwm connection if the line (pwm) is used as angle output, the total number of connections can be reduced to three, including the supply lines. this type of configuration is especially useful for remote sensors. low power mode is not possible in this configuration. if the AS5130 angular data is invalid, the pwm output will remain at low state. figure 8. data transmission with pulse width modulated (pwm) output v dd v ss micro controller AS5130 100n v ss +5v vdd cs v dd dclk dio prog v ss AS5130 c1 i/o output output + - 10f 100n 8.0 - 8.5v note: for further details on otp programming, please refer to otp programming (page 17) . v dd v ss micro controller 100n v ss +5v vdd pwm AS5130 v dd v ss ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 12 - 41 AS5130 datasheet - detailed description the minimum pwm pulse width t on (pwm = high) is 1 lsb @ 0o (angle reading = 00 h ). 1lsb = nom. ,0.556s. the pwm pulse width increases with 1lsb per step. at the maximum angle 358.6o (angle reading = ff h ), the pulse width t on (pwm = high) is 256 lsb and the pause width t off (pwm = low) is 1 lsb. this leads to a total period (t on + t off ) of 257lsb. figure 9. pwm output signal this means that the pwm pulse width is (position + 1) lsb, where position is 0?.255. the tolerance of the absolute pulse width and frequency can be eliminated by calculating the angle with the duty cycle rather t han with the absolute pulse width: angle [ 8 - bit ] = -1 (eq 1) results in an 8-bit value from 00 h to ff h , angle [ o ] = (eq 2) results in a degree value from 0o ...358.6o note: the absolute frequency tolerance is eliminated by dividing t on by (t on +t off ), as the change of the absolute timing effects both t on and t off in the same way. 7.1.4 analog output the AS5130 can generate a ratiometric analog output voltage by low-pass filtering the pwm output. figure 10 shows a simple passive 2nd order low pass filter as an example. in order to minimize the ripple on the analog output, the cut-off frequency of the low pass filt er should be well below the pwm base frequency. table 8. pwm signal parameters position angle lsb @ high t_high low column t_low duty-cycle 0 0o 1 0.556s 256 142.3s 0.39% 127 178.59o 128 71.15s 129 71.7s 49.4% 128 180o 129 71.7s 128 71.15s 50.2% 255 358.59o 256 142.3s 1 0.556s 99.6% 5v pwm out 0.556s 142.3s 71.7s 71.15s 0.556s 142.3s t on t off 0 128 255 position 257 t on t on t off + -------------------------- ?? ?? 360 256 -------- - 257 t on t on t off + -------------------------- ?? ?? 1? ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 13 - 41 AS5130 datasheet - detailed description figure 10. ratiometric analog output 7.1.5 analog sin/cos outputs with external interpolator by connecting c1 to v dd , the AS5130 provides analog sine and cosine outputs (sinp, cosp) of the hall array front-end for test purposes. these outputs allow the user to perform the angle calculation by an external adc + c, e.g. to compute the angle with a high re solution. in addition, the inverted sinus and cosine signals (sinn, cosn; see dotted lines) are available for differential signal transmissi on. the input resistance of the receiving amplifier or adc should be greater than 100k . the signal lines should be kept as short as possible, longer lines should be shielded in order to achieve best noise performance. the sinn / cosn / sinp / cosp signals are amplitude controlled to ~1.3vp (differential) by the internal agc controller. the dc bias voltage is 2.25 v. if the sinn and cosn outputs cannot be sampled simultaneously, it is recommended to disable the automatic gain control (see table 9) as the signal amplitudes may be changing between two readings of the external adc. this may lead to less accurate results. v dd v ss micro controller 100n v ss +5v vdd pwm AS5130 v dd v ss analog out r 4k7 c 1f analog out pwmout angle 360o 180o 0o 0v 5v ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 14 - 41 AS5130 datasheet - detailed description figure 11. sine and cosine outputs for external angle calculation v dd v ss micro controller AS5130 100n v ss +5v v dd sinn v dd sinp cosn cosp v ss AS5130 d da a c1 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 15 - 41 AS5130 datasheet - detailed description 7.2 serial synchronous interface (ssi) 7.2.1 commands of the ssi in normal mode wd2cos / wd2sin: xen_x disables hall element x from the sensor array in the cosine or sine channel; xinv_x inverts the voltage output of hall element x in the channels. rd2cos / rd2sin: the hall array configuration for cosine and sine channel can be read out by these commands, initial values are 0. set test cfg 1: gen_rst hi triggers a digital reset. write config: go2sleep hi activates the low power mode of the AS5130. the power consumption is significantly reduced. go2sleep lo returns to normal operation mode. during low power mode, the lock bit in command 0 and command 1 is lo. write cust: with ?wlsb_x? the threshold level for gen eration of a wake pulse is set (only import ant in polling mode). the initial value is 4 lsb. no value lower than 4 lsb can be set. the maximum value is 127 lsb. ?gain_x? sets the gain in the signal hyst_rst: ?sethyst? enables an additional hysteresis of the digital output signal. it is enabled by default. only after 2 consecutive equal signals the output is changed. ?rst_otp? forces the ic to read out the otp in polling mode. this reset has to be performed after initial startup and every wak e signal. ?rst_multi? resets the multi turn counter to 0. read cust : with this command ?wlsb_x? and ?gain_x? can be read out. rd_both: angle and multi turn counter value can be read out simultaneously by this command. due to limited data size, the parity bit is not available in this command. store ref: this command stores the actual angle as reference angle in the storage registers (only important in polling mode). the output is the stored angle (angle_stored), a flag, if the voltage at dvdd is ok (store_ok), a flag, if the supply voltage is ok (vdd_ok) and a check bit, if the register was written. rd_multi: command for read out of multi turn register (multiturn) and agc value (agc). ?lock? indicates a locked adc and ?parity? an eve n parity checksum. rd_angle: command for read out of angle value and agc value (agc). ?lock? indicates a locked adc and ?parity? an even parity checksum. table 9. ssi in normal mode # cmd bin mode 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 23 write cust 10111 write wlsb <6:0> gain <2:0> nc 22 wd2cos 10110 write xen_7 inv_7 xen_6 inv_6 xen_5 inv_5 xen_4 inv_4 xen_3 inv_3 xen_2 inv_2 xen_1 inv_1 xen_0 inv_0 21 set test cfg1 10101 write gen_r st 20 reserved 10100 write 19 hyst_rst 10011 write rst_otp nc rst_m ulti nc sethy st 18 wd2sin 10010 write xen_7 inv_7 xen_6 inv_6 xen_5 inv_5 xen_4 inv_4 xen_3 inv_3 xen_2 inv_2 xen_1 inv_1 xen_0 inv_0 17 write config 10001 write go2sle ep 16 -- 10000 write 7 read cust 00111 read wlsb <6:0> gain <2:0> nc parity 6 rd2cos 00110 read xen_7 inv_7 xen_6 inv_6 xen_5 inv_5 xen_4 inv_4 xen_3 inv_3 xen_2 inv_2 xen_1 inv_1 xen_0 inv_0 5 00101 read 4 rd_both 00100 read multiturn <7:0> angle <7:0> 3 store ref 00011 read store_ ok vdd_ok reg_s et nc angle_stored <7:0> parity 2 rd2sin 00010 read xen_7 inv_7 xen_6 inv_6 xen_5 inv_5 xen_4 inv_4 xen_3 inv_3 xen_2 inv_2 xen_1 inv_1 xen_0 inv_0 1 rd_multi 00001 read lock agc <5:0> multiturn <7:0> parity 0 rd_angle 00000 read lock agc <5:0> angle <7:0> parity ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 16 - 41 AS5130 datasheet - detailed description 7.2.2 commands of the ssi in extended mode for programming or readout of the otp data, the chip has to be started with dv dd at a low voltage (polling mode off or cap discharged) or the otp reset has to be performed. if not, the otp is not read out and the otp data is not available. write otp: writing of the otp register. the written data is volatile. ?zer o angle? is the angle, which is set for zero position. ?wake en able? enables the polling mode. ?sensitivity? is the gain setting in the signal path. ?redundancy is a number of bits, which allows t he customer to overwrite one of the customer otp bits <0:11>. prog_otp: programming of the otp register. only bits <0:15> can be programmed by the customer. rd_otp: read out the content of the otp register. data written by write_otp and prog_otp is read out. rd_otp_ana: analog read out mode. the analog value of every otp bit is available at pin 2 (prog), which allows for a verification of the f use process. no data is available at the ssi. table 10. ssi in extended mode # cmd bin mode <45:44> <43:32> <31:28> <27:26> <25> <24:23> <22:20> <19:16> <15:12> <11:9> <8> <7:0> 31 write_o tp 11111 xt write otp test id otp lock v ref hall bias osc redundan cy sensitivi ty wake enable zero angle 30 11110 xt write 29 11101 xt write 28 11100 xt write 27 11011 xt write 26 11010 xt write 25 prog_ot p 11001 xt write otp test id otp lock v ref hall bias osc redundan cy sensitivi ty wake enable zero angle 24 11000 xt write 15 01111 xt read otp test id otp lock v ref hall bias osc redundan cy sensitivi ty wake enable zero angle 14 01110 xt read 13 01101 xt read 12 01100 xt read 11 01011 xt read 10 01010 xt read 9 rd_otp_ ana 01001 xt read 8 01000 xt read ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 17 - 41 AS5130 datasheet - detailed description 7.3 otp programming for programming of the otp, an additional voltage has to be applied to the pin prog. it has to be buffered by a fast 100nf capa citor (ceramic) and a 10f capacitor. the information to be programmed is set by command 25. the otp bits 16 to 45 are used for ams factory tri mming and cannot be overwritten. figure 12. otp programming connection figure 13. external circuitry for otp programming table 11. otp programming parameters symbol parameter min max unit notes v dd supply voltage 5 5.5 v gnd ground level 0 0 v v_zapp programming voltage 8 8.5 v at pin prog t_zapp temperature 0 85 oc f_clk clk frequency 100 khz at pin dclk v dd v ss micro controller AS5130 100n v ss +5v vdd cs v dd dclk dio prog v ss AS5130 c1 i/o output output + - 10f 100n 8.0 - 8.5v v dd v supply prog gnd c1 c2 100nf 10f v zapp v prog prom cell maximum parasitic cable inductance l<50nh ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 18 - 41 AS5130 datasheet - detailed description programming verification. after programming, the programmed otp bits are verified in following two ways: by digital verification: this is simply done by sending a read otp command (#0fh, refer to table 10 ). the structure of this register is the same as for the otp prog or otp write commands. by analog verification: by sending an analog otp read command (#09h), pin prog becomes an output, sending an analog voltage with each clock, representing a sequence of the bits in the otp register. a voltage of <500mv indicates a correctly programmed bit ( ?1?) while a voltage level between 2.2v and 3.5v indicates a correctly unprogrammed bit (?0?). any voltage level in between indicates improper programming. figure 14. analog otp verification redundancy decoding. if a bit is not fused properly (analog readout levels violated), the redundancy bits can be used as shown in the table below. only one single bit can be overwritten with a logic hi. an improper fusing cannot be made undone. <15:12> replaced bit <15:12> replaced bit 0000 none 1000 7 0001 0 1001 8 0010 1 1010 9 0011 2 1011 10 0100 3 1100 11 0101 4 1101 none 0110 5 1110 none 0111 6 1111 none v dd v ss micro controller AS5130 100n v ss +5v v dd cs v dd clk dio prog v ss AS5130 c1 i/o output output v ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 19 - 41 AS5130 datasheet - detailed description 7.4 multi turn counter an 8-bit register is used for counting the magnet?s revolutions. with each zero transition in any direction, the output of a sp ecial counter is incremented or decremented. the initial value after reset is 0 lsb. the multi turn value is encoded as complement on two. clockwise rotation gives increasing angle values and positive turn count. counter clockwise rotation exhibits decreasing angle values and a negative turn count respectively. the counter output can be reset by using command 19 ? hyst_rst. it is immediately reset by the rising clock edge of this bit. a ny zero crossing between the clock edge and the next counter readout changes the counter value. 7.5 AS5130 status indicators 7.5.1 lock status bit the lock signal indicates whether the angle information is valid (adc locked, lock = high) or invalid (adc unlocked, lock = low ). to determine a valid angular signal at best performance, the following indicators should be set: lock = 1 0x00h < agc < 0x2fh note: the angle signal may also be valid (lock = 1), when the agc is out of range (00h or 2fh), but the accuracy of the AS5130 may be reduced due to the out of range condition of the magnetic field strength. 7.5.2 magnetic field strength indicators the AS5130 is not only able to sense the angle of a rotating magnet, it can also measure the magnetic field strength (and hence the vertical distance) of the magnet. this additional feature can be used for several purposes: - as a safety feature by constantly monitoring the presence and proper vertical distance of the magnet - as a state-of-health indicator, e.g. for a power-up self test - as a pushbutton feature for rotate-and-push types of manual input devices the magnetic field strength information is available in two forms ? magnetic field strength hardware indicator and magnetic fie ld strength software indicator. magnetic field strength hardware indicator. pin cao (#1) will be low, when the magnetic field is too weak. the switching limit is determined by the value of the agc. if the agc value is <3fh, the cao output will be high (green range), if the agc is at its u pper limit (3fh), the cao output will be low (red range). magnetic field strength software indicator. d13:d7 in the serial data that is obtained by command read angle (see table 9) contains the 6-bit agc information. the agc is an automatic gain control that adjusts the internal signal amplitude obtained from the hall elements to a constant level. if the magnetic field is weak, e.g. with a large vertical gap between magnet and ic, with a weak magnet or at elevated temperatures of the magnet, the agc value will be high. likewise, the agc value will be lower when the magnet is close r to the ic, when strong magnets are used and at low temperatures. bit code decimal value 01111111 127 --- --- 00000011 +3 00000010 +2 00000001 +1 00000000 0 11111111 -1 11111110 -2 11111101 -3 --- --- 10000000 -128 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 20 - 41 AS5130 datasheet - detailed description the best performance of the AS5130 will be achieved when operating within the agc range. it will still be operational outside t he agc range, but with reduced performance especially with a weak magnetic field due to increased noise. factors influencing the agc value. in practical use, the agc value will depend on several factors: the initial strength of the magnet. aging magnets may show a reducing magnetic field over time which results in an increase of the agc value. the effect of this phenomenon is relatively small and can easily be compensated by the agc. the vertical distance of the magnet. depending on the mechanical setup and assembly tolerances, there will always be some variation of the vertical distance between magnet and ic over the lifetime of the application using the AS5130. again, vertical distance var iations can be compensated by the agc. the temperature and material of the magnet. the recommended magnet for the AS5130 is a diametrically magnetized 6mm diameter magnet. other magnets may also be used as long as they can maintain to operate the AS5130 within the agc range. every magnet ha s a temperature dependence of the magnetic field strength. the temperature coefficient of a magnet depends on the used material. at elevated temperatures, the magnetic field strength of a magnet is reduced, resulting in an increase of the agc value. at low temperature s, the mag- netic field strength is increased, resulting in a decrease of the agc value. the variation of magnetic field strength over temp erature is auto- matically compensated by the agc. otp sensitivity adjustment. to obtain best performance and tolerance against temperature or vertical distance fluctuations, the agc value at normal operating temperature should be in the middle between minimum and maximum, hence it should be around 32 (20h). to fac ilitate the ?vertical centering? of the magnet+ic assembly, the sensitivity of the AS5130 can be adjusted in the otp register in 8 steps (see table 10) . the otp sensitivity setting corresponds to the customer register setting gain <2:0>. 7.6 ?pushbutton? feature using the magnetic field strength software and hardware indicators described above, the AS5130 provides a useful method of detecting both rotation and vertical distance simultaneously. this is especially useful in applications implementing a rotate-and-push type of human interface (e.g. in panel knobs and switches). the cao output is low, when the magnetic field is below the low limit (weak or no magnet) and high when the magnetic field is a bove the low limit (in-range or strong magnet). a finer detection of a vertical distance change, for example when only short vertical strokes are made by the pushbutton, is ac hieved by memorizing the agc value in normal operation and triggering on a change from that nominal the agc value to detect a vertical mo vement. figure 15. magnetic field strength indicator v dd v ss micro controller AS5130 100n v ss +5v v dd cs v dd dclk dio v ss AS5130 c1 i/o output output cao 1k led1 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 21 - 41 AS5130 datasheet - detailed description 7.7 high speed operation the AS5130 is using a fast tracking adc (tadc) to determine the angle of the magnet. the tadc has a tracking rate of 1.15s (ty p). once the tadc is synchronized with the angle, it sets the lock bit in the status register (see table 9) . in worst case, usually at start-up, the tadc requires a maximum of 127 steps (127 * 1.15s = 146.05s) to lock. once it is locked, it requires only one cycle (1.15s) to track the moving magnet. the AS5130 can operate in locked mode at rotational speeds up to 30,000 rpm. in low power mode, the position of the tadc is frozen. it will continue from the frozen position once it is powered up again. i f the magnet has moved during the power down phase, several cycles will be required before the tadc is locked again. the tracking time to lock i n with the new magnet angle can be roughly calculated as: t lock = 1.15s* |newpos ? oldpos| (eq 3) where: t lock = time required to acquire the new angle after power up from one of the reduced power modes [s] oldpos = angle position when one of the reduced power modes is activated [o] newpos = angle position after resuming from reduced power mode [o] 7.7.1 propagation delay the propagation delay is the time required from reading the magnetic field by the hall sensors to calculating the angle and mak ing it available on the serial or pwm interface. while the propagation delay is usually negligible on low speeds, it is an important parameter at h igh speeds. the longer the propagation delay, the larger becomes the angle error for a rotating magnet as the magnet is moving while the angle is calculated. the position error increases linearly with speed. the main factors that contribute to the propagation delay are discussed in detail further in this document. 7.7.2 sampling rate for high speed applications, fast adcs are essential. the adc sampling rate directly influences the propagation delay. the fast tracking adc used in the AS5130 with a tracking rate of only 1.15s (typ) is a perfect fit for both high speed and high performance. 7.7.3 chip internal lowpass filtering a commonplace practice for systems using analog-to-digital converters is to filter the input signal by an anti-aliasing filter. the filter characteristic must be chosen carefully to balance propagation delay and noise. the lowpass filter in the AS5130 has a cutoff frequency of typ. 23.8khz and the overall propagation delay in the analog signal path is typ. 15.6s. 7.7.4 digital readout rate aside from the chip-internal propagation delay, the time required to read and process the angle data must also be considered. d ue to its nature, a pwm signal is not very usable at high speeds, as you get only one reading per pwm period. increasing the pwm frequency may im prove the situation but causes problems for the receiving controller to resolve the pwm steps. the frequency on the AS5130 pwm output is typ. 1.95khz with a resolution of 2s/step. a more suitable approach for high speed absolute angle measurement is using the serial interface. with a clock rate of up to 6mhz, a complete set of data (21bits) can be read in >3.5s. 7.7.5 total propagation delay of the AS5130 the total propagation delay of the AS5130 is the delay in the analog signal path and the tracking rate of the adc: 15.6s + 1.15s = 16.75s (eq 4) if only the sin-/cos-outputs are used, the propagation delay is the analog signal path delay only (typ. 15.6s). position error over speed: the angle error over speed caused by the propagation delay is calculated as: ? pd = rpm * 6 * 16.75e -6 in degrees (eq 5) in addition, the anti-aliasing filter causes an angle error calculated as: lpf = arctan [rpm / (60*f0)] (eq 6) table 12. examples of the overall position error caused by speed (includes both propagation delay and filter delay) speed (rpm) total position error ( ? pd + lpf ) 100 0.0175o ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 22 - 41 AS5130 datasheet - detailed description 7.8 reduced power modes the AS5130 can be operated in three reduced power modes. all thr ee modes have in common that they switch off or freeze parts of the chip during intervals between measurements. in low power mode or ultr a low power mode, the AS5130 is not operational, but due to the fast start- up, an angle measurement can be accomplished very quickly and the chip can be switched to reduced power immediately after a val id measurement has been taken. depending on the intervals between measurements, very low average power consumption can be achieved using such a strobed measurement mode. low power mode: reduced current consumption, very fast start-up. ideal for short sampling intervals (<3ms). power cycling mode: zero power consumption (externally switched off) during sampling intervals, but slower start-up than pollin g mode. ideal for sampling intervals 200ms. polling mode: for reduction of the average power consumption; especially suited for battery powered applications. 7.8.1 low power mode the AS5130 can be put in low power mode by simple serial commands, using the regular ssi commands. the required serial command is write config (17h, figure 4 on page 9 ). the angle data is valid, as soon as the lock- flag is 1 (see table 9) . in reduced power modes, the AS5130 is inactive. the last state, e.g. the angle, agc value, etc. is frozen and the chip starts f rom this frozen state when it resumes active operation. this method provides much faster start-up than a ?cold start? from zero. figure 16. low power mode and ultra low power mode connection 1000 0.175o 10000 1.75o table 12. examples of the overall position error caused by speed (includes both propagation delay and filter delay) speed (rpm) total position error ( 't pd + ' t lpf ) v dd v ss micro controller AS5130 100n v ss +5v v dd cs v dd dclk dio v ss AS5130 c1 s n i on i off t on t off on/off r1 c1 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 23 - 41 AS5130 datasheet - detailed description if the AS5130 is cycled between active and reduced current mode, a substantial reduction of the average supply current can be achieved. the minimum dwelling time in active mode is the wake-up time. the actual active time depends on how much the magnet has moved while the AS5130 was in reduced power mode. the angle data is valid, when the status bit lock has been set (see table 9) . once a valid angle has been measured, the AS5130 can be put back to reduced power mode. the average power consumption can be calculated as: i avg = sampling interval = t on + t off (eq 7) where: i avg = average current consumption i active = current consumption in active mode i power_down = current consumption in reduced power mode t on = time period during which the chip is operated in active mode t off = time period during which the chip is in reduced power mode reducing power supply peak currents. an optional rc-filter (rx/cx) may be added to avoid peak currents in the power supply line when the AS5130 is toggled between active and reduced power mode. rx must be chosen such that it can maintain a v dd voltage of 4.5 ? 5.5v under all conditions, especially during long active periods when the charge on cx has expired. cx should be chosen such that it can s upport peak currents during the active operation period. for long active periods, cx should be large and rx should be small. 7.8.2 power cycling mode the power cycling method shown in figure 17 cycles the AS5130 by switching it on and off, using an external pnp transistor high side switch. the current consumption in off-mode is zero. it also has the longest start-up time of all modes, as the chip must always perfor m a ?cold start? from zero, which takes about 2ms (compare with low power mode on page 22 ). figure 17. power cycling mode the optional filter rx/cx may again be added to reduce peak currents in the 5v power supply line (see reducing power supply peak currents on page 23) . i active ? t on i powerdown ? t off + t on t off + --------------------------------------------------------------------- v dd v ss micro controller AS5130 100n v ss +5v v dd cs v dd dclk dio v ss AS5130 c1 s n i on 0 t on t off on/off rx 10k t on t off cx >f ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 24 - 41 AS5130 datasheet - detailed description 7.8.3 polling mode target of this mode is a reduction of the average power consumpt ion. in this mode, the ic supply is pulsed, thereby reducing th e average power consumption to a fraction. the actual angle information and multi turn count value is not lost; polling mode is especially suit ed for battery powered applications. the ic is furthermore capable of generating a wake signal as soon as the magnet?s position has changed, b ut only if the supply of the ic is powered-on again. by means of the wake si gnal, the system?s power consumption can be further decreased, if certain modules are activated on demand. figure 18. external circuitry for polling mode the voltage at pin 16 (dv dd ) determines whether polling mode is activated or not. any voltage above 3.6v activates the polling functionality. this voltage must always be present at dv dd in order to hold the information in the registers. the procedure is as follows: 1. initial startup: the circuit starts up with invalid trim values, which are read back from the storage registers; the comman d rst_otp (command 19 ? 10011) must be sent to read out valid trim values from the otp. 2. these values are copied to the storage registers if otp<8> (wake enable) is set (must be set for polling mode). 3. the values of agc counter, actual angle, multi turn counter, hysteresis setting, wake threshold and gain setting are contin uously updated in the storage registers. 4. the actual angle is stored as a reference by sending command store ref (command 3 ? 00011). without this reference angle, a wake is generated at every startup. 5. the update of the storage registers is stopped if v dd drops below 4.45v and then the information is stored (dv dd ) at the next startup (v dd on), the values are read back from the storage registers and the measured angle is compared with the stored reference angle; i f the difference between both exceeds the threshold, a wake pulse is generated. dv dd wake t_on t_off t_wakeup 100n +5v >1.5k v dd AS5130 v ss ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 25 - 41 AS5130 datasheet - detailed description figure 19. wake up signal flowchart figure 21 shows the behavior of the wake up signal. the wake up signal will be low for t wakeup = 10us. after that, the wake up signal will go to tri- state condition. in case of an angle comparison with a result below the threshold, the signal will remain in tri-state conditio n. after switching on vdd, the system needs max. 250us to generate an angle with maximum accuracy. a wake signa l cannot be ex pected until the end of this period. wake interface. an open drain nmos structure is used in the wake pad. in order to generate a clear output signal level, a pull up resistor is required. the pad can drive 4ma. figure 20. wake output pin v dd on (fast) store_ok por lo lo hi hi reset & reset_storage reset digital core only retrieve values from storage registers wake (26 clk periods) wait (162 clks - 86us ... 95us) compare mode wake_on normal mode store_ok ? copy to storage normal mode otp readout (46bit - 140us ... 400us) true true false false wake (20 clk periods) command rst_otp otp readout (otp <8> = hi | measured ? stored| > threshold pull up resistor wake pad AS5130 vdd ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 26 - 41 AS5130 datasheet - detailed description figure 21. wake up signal during polling mode of vdd table 13. wake interface parameters symbol parameter min max unit notes r pull_up pull up resistor 1.5 100 k the used pad can drive 4ma. t wake up wake up pulse 10 17 s interrupt signal to external devices, tri-state output, low active. t on on-time 250 --- s time for power up in polling mode. t off off-time --- --- ms no limit unless dv dd is always supplied. vdd tri-state wake tri-state t_on t_off t_on t_wakeup delta (actual - reference angle) > threshold delta (actual - reference angle) www.austriamicrosystems.com/AS5130 revision 1.12 27 - 41 AS5130 datasheet - application information 8 application information benefits of AS5130 are as following: complete system-on-chip flexible system solution providing absolute angle position, with serial data and pwm output ideal for applications in harsh environments due to magnetic sensing principle high reliability due to non-contact sensing robust system, tolerant to misalignment, airgap variations, temperature variations and external magnetic fields 8.1 application example i: 3-wire sensor with magneti c field strength indication in figure 22 , a simple 360o sensor with pwm output is shown. the complete applicat ion requires only three wires, vdd, vss and the pwm output. the circle over the center of the chip represents the diametrically polarized magnet. additionally, the cao pin will de liver an analog voltage indicating a missing magnetic field. this signal could be used to drive an external led or to detect an alert signal. figure 22. 3-wire angle sensor AS5130 100n v ss +5v cs dclk dio cao 1k led1 AS5130 v dd v ss AS5130 prog s n pwm out pwm cao ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 28 - 41 AS5130 datasheet - application information 8.2 application example ii: low-power encoder via ssi, the AS5130 will be able to toggle between active mode and low power mode. in active mode, the current consumption is ~ 15ma and in low power mode 2ma. the fastest possible startup time from low power mode is 150s. the AS5130 can be periodically switched bet ween active and low power mode, the average power consumption depends on the duty cycle. in order to read out the correct data, the active mode time must be larger than 150s. figure 23. low power encoder i avg = (eq 8) example: sampling period = one measurement every 10ms. system constants = i active = 15ma, i power_down = 2 ma, t off = 9,85ms, t on (min) = 150s (start-up from low power mode): i avg = = 2.195ma (eq 9) v dd v ss micro controller AS5130 100n v ss +5v vdd cs v dd dio v ss AS5130 s n on/off clk i active ? t on i powerdown ? t off + t on t off + --------------------------------------------------------------------- 15 ma ? 150 s 2 ma ? 985 ms , + 150 s 985 ms , + ------------------------------------------------------------------------- - ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 29 - 41 AS5130 datasheet - application information 8.3 application exampl e iii: polling mode figure 24. polling mode once powered up for at least 2.5ms, the AS5130 can be operated in a pulsed mode, where it is periodically turned on/off by a hi gh side fet (pmos) switching transistor with a low ron (<10 ). the on-time is at least 250s in order to perform one measurement. a valid measurement result can be verified by checking the lock bit (adc is locked) in the serial data stream. after startup an otp reset has to be performed in order to read out valid trimming information. then a special ssi command (sto re ref) copies the actual angle into a buffered reference angle register. now the AS5130 can be turned off. special registers will be b uffered by the low power supply and will keep the actual settings. after a t on of min. 250 us, the actual angle is compared with the stored reference angle. if the angle difference is larger than a threshold value (wlsb, ssi command write cust), the AS5130 will send an interrupt request to an external device via the wake pin. due to the internal por level of the ic, t on starts after v dd has reached 4.3v (worst case por level) .the average power consumption in this pulsed mode depends on the supply current in active mode and the duty cycle of the on/off pulse: i avg = (eq 10) example: sampling period = one measurement every 100ms. system constants = i active = 19ma, t on (min) = 250s: i avg = = 47.5a (eq 11) v dd v ss micro controller AS5130 100n v ss +5v vdd cs vdd clk dio v ss AS5130 s n on/off 10k t on t off cx >1f +5v dv dd i active ? t on t on t off + ------------------------ - 19 ma ? 250 s 250 s 99.75 ms + ------------------------------------------ ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 30 - 41 AS5130 datasheet - application information 8.4 accuracy of the encoder system this section enlightens on the individual factors that influence the accuracy of the encoder system, and provides techniques to improve them. accuracy is defined as the difference between measured angle and actual angle. this is not to be confused with resolution, which is the smallest step that the system can resolve. the two parameters are not necessarily linked together. a high resolution encoder may not nec essarily be highly accurate as well. 8.4.1 quantization error there is however a direct link between resolution and accuracy, which is the quantization error: figure 25. quantization error of a low resolution and a high resolution system the resolution of the encoder determines the smallest step size. the angle error caused by quantization cannot get better than ? lsb. as shown in figure 25 , a higher resolution system (right picture) has a smaller quantization error, as the step size is smaller. for the AS5130, the quantization error is ? lsb = 0.7o high resolution low resolution error +1/2 lsb -1/2 lsb +1/2 lsb -1/2 lsb digitized function digitized function ideal function ideal function quantization error ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 31 - 41 AS5130 datasheet - application information figure 26. typical inl error over 360o figure 26 shows a typical example of an error curve over a full turn of 360o at a given x-y- displacement. the curve includes the quanti zation error, transition noise and the system error. the total error is ~2.2o peak/peak (+/-1.1o). the sawtooth-like quantization error (see figure 25) can be reduced by averaging, provided that the magnet is in constant motion and there are an adequate number of samples available. the solid bold line in figure 26 shows the moving average of 16 samples. the inl (intrinsic non- linearity) is reduced to from ~+/- 1.1o down to ~ +/-0.3o. the averaging however, also increases the total propagation delay, t herefore it may be considered for low speeds only or adaptive; depending on speed (see position error over speed: on page 21) . inl including quantization error -1,5 -1 -0,5 0 0,5 1 1,5 0 45 90 135 180 225 270 315 360 angle steps inl [] inl average (16x) ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 32 - 41 AS5130 datasheet - application information 8.4.2 vertical distance of the magnet the chip-internal automatic gain control (agc) regulates the input signal amplitude for the tracking-adc to a constant value. t his improves the accuracy of the encoder and enhances the tolerance for the vertical distance of the magnet. figure 27. typical curves for vertical distance versus acg value on several untrimmed samples as shown in figure 27 , the agc value (left y-axis) increases with vertical distance of the magnet. consequently, it is a good indicator for determining the vertical position of the magnet, for example as a pushbutton feature, as an indicator for a defective magnet or as a preventive warning (e.g. for wear on a ball bearing etc.) when the nominal agc value drifts away. if the magnet is too close or the magnet ic field is too strong, the agc will be reading 0. if the magnet is too far away (or missing) or if the magnetic field is too weak, the agc wil l be reading 63 (3fh). the AS5130 will still operate outside the agc range, but the accuracy may be reduced as the signal amplitude can no longer be k ept at a constant level. the linearity curve in figure 27 (right y-axis) shows that the accuracy of the AS5130 is best within the agc range, even slightly better at small airgaps (0.4 ? 0.8mm). at very short distances (0 ? 0.1) the accuracy is reduced, mainly due to nonlinearities in the magnetic field. at larger distances, outside the agc range (~2.0 ? 2.5mm and more) the accuracy is still very good, only slightly decreased fro m the nominal accuracy. since the field strength of a magnet changes with temperature, the agc will also change when the temperature of the m agnet changes. at low temperatures, the magnetic field will be stronger and the agc value will decrease. at elevated temperatures, th e magnetic field will be weaker and the agc value will increase. linearity and agc vs airgap 0 8 16 24 32 40 48 56 64 0 500 1000 1500 2000 2500 airgap [m] agc value 1,0 1,2 1,4 1,6 1,8 2,0 2,2 linearity [] sample#1 sample#2 sample#3 sample#4 linearity [] ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 33 - 41 AS5130 datasheet - application information 8.4.3 choosing the proper magnet there is no strict requirement on the type or shape of the magnet to be used with the AS5130. it can be cylindrical as well as square in shape. the key parameter is that the vertical magnetic field b z measured at a radius of 1mm from the rotation axis is sinusoidal with a peak amplitude of 20...80mt (see figure 28) . figure 28. vertical magnetic fields of a rotating magnet n s magnet axis vertical field component (20?80mt) 0 360 360 bz vertical field component r1 concentric circle; radius 1.0 mm r1 magnet axis typ. 6mm diameter s n ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 34 - 41 AS5130 datasheet - application information 8.4.4 magnet placement ideally, the center of the magnet, the diagonal center of the ic and the rotation axis of the magnet should be in one vertical line. the lateral displacement of the magnet should be within 0.25mm from the ic package center or +/-0.5mm from the ic center, including the pl acement of the chip within the ic package. the vertical distance should be chosen such that the magnetic field on the die surface is withi n the specified limits. the typical distance ?z? between the magnet and the package surface is 0.5mm to 1.8mm with the recommended magnet (6mm x 2.5mm). larger gaps are possible, as long as the required magnetic field strength stays within the defined limits. a magnetic field out side the specified range may still produce acceptable results, but with reduced accuracy. the out-of-range condition will be indicated, when the a gc is at the limits (agc= 0: field too strong; agc=63=(3f h ): field too weak or missing magnet). figure 29. b z field distribution along the x-axis of a 6mm? diametric magnetized magnet figure 29 shows a cross sectional view of the vertical magnetic field component bz between the north and south pole of a 6mm diameter magnet, measured at a vertical distance of 1mm. the poles of the magnet (maximum level) are about 2.8mm from the magnet center, which is almost at the outer magnet edges. the magnetic field reaches a peak amplitude of ~106mt at the poles. the hall elements are lo cated at a radius of 1mm (indicated as squares at the bottom of the graph). due to the side view, the two hall elements at the y-axis are overlapping at x=0mm, therefore only 3 hall elements are shown. at 1mm radius, the peak amplitude is ~46mt, respectively a differential ampli tude of 92mt. the vertical magnetic field b z follows a fairly linear pattern up to about 1.5mm radius. consequently, even if the magnet is not perfectly centered, the differential amplitude will be the same as for a centered magnet. for example, if the magnet is misaligned in x-axis by -0.5mm, the two x-hall sensors will measure 70mt (@ x = -1.5mm) and -22mt (@ x = - 0.5mm). again, the differential amplitude is 92mt. at larger displacements however, the b z amplitude becomes nonlinear, which results in larger errors that mainly affect the accuracy of the system (see figure 31) . bz; 6mm magnet @y=0; z=1mm -0.0015 -0.001 -0.0005 0 0.0005 0.001 0.0015 -3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 x-displacement [mm] n s ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 35 - 41 AS5130 datasheet - application information figure 30. vertical magnetic field distribution of a cylindrical 6mm? diametric magnetized magnet at 1mm gap figure 30 shows the same vertical field component as figure 29 , but in a 3-dimensional view over an area of 4mm from the rotational axis. 8.4.5 lateral displacement of the magnet as shown in the magnet specifications (see parameters for magnet under electrical characteristics on page 6 ), the recommended horizontal position of the magnet axis with respect to the ic package center is within a circle of 0.25mm radius. this includes the placem ent tolerance of the ic within the package. figure 31 shows a typical error curve at a medium vertical distance of t he magnet around 1.2mm (agc = 24). the x- and y- axis of the gra ph indicate the lateral displacement of the magnet center with respect to the ic center. at x=y=0, the magnet is perfectly centere d over the ic. the total displacement plotted on the graph is for 1mm in both directions. the z-axis displays the worst case inl error over a ful l turn at each given x-and y- displacement. the error includes the quantization error of 0.7o (refer to quantization error on page 30 ). for example, the accuracy for a centered magnet is between 1.0 ? 1.5o (spec = 2o over full temperature range). within a radius of 0.5mm, the accuracy is bett er than 2.0o (spec = 3o over temperature). 4 3 2 1 0 -1 -2 -3 -4 4 3 2 2 1 0 -1 -2 -3 -125 -100 -75 -50 -25 0 25 50 75 100 125 bz [mt] y-displacement [mm] x-displacement [mm] bz; 6mm magnet @ z=1mm area of x-y-misalignment from center: +/- 0.5mm circle of hall elements on chip: 1mm radius n s ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 36 - 41 AS5130 datasheet - application information figure 31. typical error curve of inl error over lateral displacement (including quantization error) 8.4.6 magnet size figure 29 to figure 31 illustrate a cylindrical magnet with a diameter of 6mm. smaller magnets may also be used, but since the poles are closer together, the linear range will also be smaller and consequently the tolerance for lateral misalignment will also be smaller. if the 0.25mm lateral misalignment radius (rotation axis to ic package center) is too tight, a larger magnet can be used. larg er magnets have a larger linear range and allow more misalignment. however at the same time the slope of the magnet is more flat, which results i n a lower differential amplitude. this requires either a stronger magnet or a smaller gap between ic and magnet in order to operate in th e amplitude- controlled area (agc > 0 and agc < 63). in any case, if a magnet other than the recommended 6mm diameter magnet is used, two parameters should be verified: verify, that the magnetic field produces a sinusoidal wave, when the magnet is rotated. note that this can be done with the sin -/cos- out- puts of the AS5130; e.g. rotate the magnet at constant speed and analyze the sin- (or cos-) output with an fft-analyzer. it is recom- mended to disable the agc for this test (see analog sin/cos outputs with external interpolator on page 13) . verify that the b z -curve between the poles is as linear as possible (see figure 29) . this curve may be available from the magnet supplier(s). alternatively, the sin- or cos- output of the AS5130 may also be used together with an x-y- table to get a b z -scan of the magnet (as in figure 29 or figure 30 ). furthermore, the sinewave tests described above may be re-run at defined x-and y- misplacements of the magnet to determine the maximum acceptable lateral displacement range. it is recommended to disable the agc for both these tests (see analog sin/cos outputs with external interpolator on page 13) . note: for preferred magnet suppliers, please refer to the austriamicrosystems website (rotary encoder section). -1000 -750 -500 -250 0 250 500 750 1000 -1000 -750 -500 -250 0 250 500 750 1000 0,000 0,500 1,000 1,500 2,000 2,500 3,000 3,500 4,000 4,500 5,000 inl [] x displacement [m] y displacement [m] inl vs. displacement: as5030 for agc24 4,500-5,000 4,000-4,500 3,500-4,000 3,000-3,500 2,500-3,000 2,000-2,500 1,500-2,000 1,000-1,500 0,500-1,000 0,000-0,500 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 37 - 41 AS5130 datasheet - package drawings and markings 9 package drawings and markings the device is available in a 16-lead shrink small outline package. figure 32. package drawings and dimensions 513001 yywwmzz symbol min nom max a 1.73 1.86 1.99 a1 0.05 0.13 0.21 a2 1.68 1.73 1.78 b 0.22 0.30 0.38 c 0.09 0.17 0.25 d 5.90 6.20 6.50 e 7.40 7.80 8.20 e1 5.00 5.30 5.60 e - 0.65 bsc - l 0.55 0.75 0.95 l1 - 1.25 ref - l2 - 0.25 bsc - r0.09 - - 0o 4o 8o n1 6 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 38 - 41 AS5130 datasheet - package drawings and markings notes: 1. dimensions and tolerancing conform to asme y14.5m-1994 . 2. all dimensions are in millimeters, angle are in degrees. marking: yywwmzz. 9.1 recommended pcb footprint figure 33. pcb footprint yy ww m zz year manufacturing week assembly plant identifier assembly traceability code recommended footprint data symbol mm inch a9 .0 20 . 35 5 b6 .1 60 . 24 2 c0.460.018 d0.650.025 e5 .0 10 . 19 7 ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 39 - 41 AS5130 datasheet - revision history revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 1.5 may 31, 2007 apg initial version 1.6 sep 11, 2008 ordering code updated 1.9 mar 03, 2009 updated absolute maximum ratings (page 5) 1.10 feb 02, 2010 updated values for the following parameters (see electrical characteristics on page 6) 1) power supply current 2) pwm period 3) pwm frequency 1.11 jun 09, 2010 rfu 1) replaced instances of ?sleep mode? to ?low power mode? 2) removed duplicate instances of t pwrup and n; deleted hyst from table 6 . 3) replaced instances of avdd to vdd 4) updated diagram for extended operation mode (for access of otp only) (page 10) 1.12 may 12, 2011 mub updated absolute maximum ratings, electrical characteristics, package drawings and markings. ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 40 - 41 AS5130 datasheet - ordering information 10 ordering information the devices are available as the standard products shown in table 14 . note: all products are rohs compliant and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.com/icdirect technical support is available at http://www.austriamicrosystems.com/technical-support for further information and requests, please contact us mailto: sales@austriamicrosystems.com or find your local distributor at http://www.austriamicros ystems.com/distributor table 14. ordering information ordering code description delivery form package AS5130-asst-om 8-bit magnetic rotary encoder with multiturn function tape & reel 16-pin ssop (5.3mm x 6.2mm) AS5130-assu-om tubes ams ag technical content still valid
www.austriamicrosystems.com/AS5130 revision 1.12 41 - 41 AS5130 datasheet - copyrights copyrights copyright ? 1997-2011, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registe red ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth he rein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specificatio ns and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamic rosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temper ature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of les s than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact ams ag technical content still valid

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